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    Non-Volatile Design Verification Challenges

      Scott Jacobson
     Aug 11, 2014

    Non-Volatile Design Verification Challenges. Agenda, NAND Flash growth, ECC Problems and pproaches, ECC Trends, Verification challenges, Alternatives, Future. Growth pressures for higher density and higher performance has driven the transition from SLC to MLC This transition does not come at no cost, increased capacity also increases sensitivity to errors. Not only does the capacity increase demand higher amounts of ECC per block, but it also decreases endurance. NAND Flash Scaling Additionally, in order to keep up with the lowest cost manufacturing solutions, NAND Flash technology must also scale with process technology. Wear Leveling, Required on both SLC and MLC devices, SLC typically endures up to 100k Program/Erase Cycles, MLC typically endures up to 10k rogram/Erase Cycles, Distributes the write cycles more evenly across the entire FLASH device. Read Disturb, High # of reads can cause changes in surrounding cells if not rewritten, Results in data loss, Periodic re, write of surround cells alleviates the problem. Data Retention, Data Retention endurance affected by program/erase cycles, Limit reads to reduce read disturb, Limit program/erase cycles in blocks that need long retention. FLASH ECC Approaches, Current ECC approaches Traditional: Hamming Code, Reed, Soloman, Modern, Bose, Ray, Chaudhuri, Hocquenghem (BCH), Low Latency, Small gate counts, small overhead, limited ECC, Long BCH, Medium Latency, Medium gate counts, small overhead, better ECC, Low Density Parity Check (LDPC), High Latency, Large gate counts, small overhead, best ECC. FLASH ECC approaches, BCH ( Bose, Ray, Chaudhuri, Hocquenghem), Typically used on MLC NAND Flash SD Cards, SPI, eMMC, Embedded NAND, Multi-bit correction, Improved efficiency over Reed, Soloman Simpler encoding/decoding techniques, Detects concentrated and scattered errors. Some applications may not see a huge number of writes compared to a cache application, where writes are the most limiting parameter. For embedded applications where booting and code are the dominating attributes, error correction coding (ECC) and known, good boot blocks are the most important features. ECC has been increasing at each process node shrink.

    Important Tags: free publish presentation, publish presentation, publish electronics Presentations
    Views: 2231
    Domain: Electronics
    Category: Semiconductors

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