Rise In Semiconductor Capacity Utilization

    Capacity utilization is expected to rise in March as the industry comes off its normal holiday production weakness, according to a recent Chip Insider® Graphics report from VLSI Research.  Tester utilization is being driven up by an expansion of device complexity from 16/14nm node production ramp. Here the combination of more transistors and lower yields is driving up test times, which eats away at test capacity. Both assembly and test utilization is being driven up by the industry’s move to advance packaging, which requires new tool capability. In addition to these drivers, Wafer Fab utilization is being also being driven by the transition to the 10nm node in early logic production and the much anticipated 3D NAND ramp.


    The contents of this release are approved for use by media for news purposes identifying VLSIresearch as the source. No advertising or promotional use of this release by corporations can be used without VLSIresearch approval. All trademarks, service marks, and logos are the property of VLSI Research Inc or their respective owners.

    More information about The Chip Insider™ is available here:




    About VLSIresearch

    VLSIresearch is an award-winning provider of market research and economic analysis on the technical, business, and economic aspects within semiconductor, nanotechnology, and related industries. VLSIresearch provides intelligence for faster and better decision making in the areas of semiconductors, photovoltaics, LEDs, manufacturing, materials, and critical subsystems.  VLSIresearch was founded in 1976. Learn more at www.vlsiresearch.com.

    Contact: Risto Puhakka| email: analyst @ vlsiresearch.com | ph:408.453.8844

    VLSIresearch | Ph: 408.453.8844 | 2290 North First Street Suite 202 San Jose, CA 95131

    … intelligence to make better decisions faster

     VLSIresearch.com          ChipHistory.org