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This New Chip: IBM’s CMOS Image Sensor (CIS) Foundry.
G. Dan Hutcheson
The Chip Insider®
October 13, 2005
This New Chip:
CMOS Image Sensor (CIS) Foundry. Everybody knows that digital cameras generate a lot of demand for flash memory, but what about the image sensors? While they may never generate the volume of silicon of flash, they do have some pretty interesting technology and technical challenges. What’s important in image sensors is very different from a conventional IC. You can’t think electrons and microns, you have to think in terms of photons. That’s where it gets exciting.
IBM’s been working with Kodak on a new generation of sensors since last year. The result is two new sensors from Kodak that incorporate its PIXELUX technology. They have an architecture based on the use of low dark current pinned photodiodes in a four-transistor cell and shared pixels. This gives them CIS pixel sizes similar to the smallest CCD pixels, but with better photosensitivity and lower noise relative to standard CIS devices.
Low dark current (I
) may sound like something out of Star Wars, but it is similar to I
in a processor cell, as it is a measure of leakage when the pixel is off. The difference is that lower dark current in an image sensor improves sensitivity, while lowering noise. The IBM has achieved extremely low dark current figures of less than 1 nano-Amp-per-centimeter-squared at 60 degrees centigrade, which is as much as a third less than comparable mainstream imaging chips. To give you an idea of how low this is, it works out to only tens of electrons per pixel.
Quantum efficiency and angle response are another critical metrics in image sensors. It drives the sensitivity of the pixels or ISO rating. This is another area where IBM’s process technology really excels with roughly a 50% improvement in quantum efficiency. So how do they do it? It’s all in the process technology.
If you look at a CIS pixel, it is essentially a micro camera (see Image File 1):
There is a micro lens on top that focuses the light down on a sensor that sits at the bottom of many layers. So the process technology game is first to design a photo diode with the lowest dark current possible and then to optimize quantum efficiency and angle response by getting more light to the photo diode through the stack of layers. Since the layers are essentially a multi-element lens column it is critical that – in addition to the normal electrical considerations of building an IC – the optical path be clear, unobstructed, and as thin as possible. There are 14 optical interfaces in the three-metal layer chip shown above, so it is a fairly complicated lens column. This is where IBM’s technological prowess comes to the forefront.
Less lens material is better when it comes to optical efficiency. So the overall thickness of the film stack is a critical metric of light transmission. Making the optical stack thin also improves angle response which lends better resolution and prevents corner darkening (due to light coming in at an angle). Applying their years of experience in copper interconnect, IBM is able to have extremely thin copper interconnect layers, which decreases the total height of the oxide film stack. IBM’s knowledge of films also allows them to design an oxide, nitride, lens material, and color filter stack of materials that is extremely transmissive.
Three other process areas where IBM’s known strengths deliver are in planarization, cleaning, and understanding surface states. By ensuring that each oxide layer is flat, clean, and ready for the next layer, they get no reflective interface barriers. These barriers are a critical problem in image sensors for two reasons: one is that they simply reduce light transmission and second they create a problem known as wild photons (this is real, not my web site).
Wild photons are photons that reflect out of one pixel and spill over into another. They create color noise and inaccuracy. Remember I said you couldn’t think in microns. Like with silicon, smaller pixel sizes do translate into more integration and hence more pixels for less cost (it’s Moore’s Law applied to pixels). But wild photons tend to occur more when pixels are packed tighter. So the 8 megapixel consumer digital camera with an APS sized chip may only cost $1000, but it will not produce the image quality of a $4000 professional model. Why the $3000 difference? Larger die mean lower yields and in this case much lower yields. So the cost skyrockets. Thus the design trade offs are similar, it’s just that photons are central to the business model. Make the pixel too small and pack them too closely and quality suffers. Make them large and loose and the chip’s too expensive. So it’s all about driving image quality up, while being affordable at each end market price point.
The micro-lens is an area where new process skills are needed. Making a spherical surface is alien to conventional chip making. Simply doing it is an impressive feat. But again, optical efficiency is needed. The light must be focused and no light should stray between pixels. IBM uses a webbed lens design that yields 88% efficiency and has plenty of dark space between the diagonals. Below you can see the evolution of lens design (See Image File 2).
So far, IBM has been able to achieve a 35% improvement in efficiency with its webbed lens. This lens allows them to two times more light into the pixel than what they could achieve without a micro-lens.
All in all, IBM’s CMOS Imaging Sensor is a marvelous example of process engineering being used to solve a multidimensional problem in an electrical and optical space.
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